DC power converters with digital feedback control offer advantages of flexibility and programmability. The
research in this area has attracted much attention in recent year . Designing the feedback for such converters
requires detailed modeling of the converters and the digital feedback compensation. An S-domain
small-signal model for the converters with voltage-mode digital control was reported . This approach offers a
practical and useful way to design the feedback system for a digital voltage-mode DC power converter because
most of the conventional power converter engineers are familiar with the S-domain model of the converter with
analog control schemes.
The focus of the present paper is to propose and verify a small-signal S-domain model for DC/DC power
converters with digital peak-current-mode control. S-domain model was chosen because most of the power
converter engineers are familiar with S-domain model for conventional converters using traditional analog control
schemes. In the paper, the problems with delay effect and the limit-cycle instability unique to digital control
were addressed in the context of a DPCM converter. An FPGA-based buck converter was built for experimental
verification of the proposed model.